MC68328PV16VA

Product Summary

The MC68328PV16VA is an Integrated Portable System Processor. The MC68328PV16VA system integration module (SIM28) consists of several functions that control the system startup, initialization, configuration, and the external bus with a minimum of external devices. The MC68328PV16VA memory interface allows the user to interface gluelessly with the popular SRAM, EPROM as well as PCMCIA 1.0 memory cards, with the assistance of chip select logic, wait states can be programmable. The MC68328PV16VA hardware and software watchdog timers help the user to do system protections. The interrupt controller accepts and resolves the priority from internal modules and external generated interrupts and also handles the masking and wake-up selection control for power control. The MC68328PV16VA low-power logic can be used to control the CPU power dissipation by altering the frequency or stopping it. The MC68328PV16VA is also capable of configuring the pin to allow the user to select either dedicated I/O or parallel I/O. This feature helps to increase the number of available I/O ports by reclaiming when the dedicated function is not in used.

Parametrics

MC68328PV16VA absolute maximum ratings: (1)Access Time: 16.0μs; (2)Clock Speed: 16.0MHz; (3)Supply Voltage (DC): 5.00V; (4)Case / Package / Footprint: TQFP-144; (5)Lead-Free Status: Contains Lead; (6)Mounting Type: Surface Mount; (7)Packaging: Bulk; (8)RoHS Non-Compliant.

Features

MC68328PV16VA features: (1)Full Compatibility With MC68000 And MC68EC000; (2)32-Bit both External and Internal Address Bus capable of addressing 4GB Space; (3)16-Bit On-Chip Data Bus For MC68000 Bus Operations; (4)Static Design Allows Processor Clock To Be Stopped Providing Dramatic Power Savings; (5)2.7 MIPS Performance At 16.67-MHz Processor Clock; (6)External M68000 Bus Interface with Dynamic Bus Sizing for 8bit and 16-bit Data Ports; (7)System Configuration, Programmable Address Mapping; (8)Glueless Interface to SRAM, EPROM, FLASH Memory; (9)Sixteen Programmable Peripheral Chip Selects With Wait State Generation Logic; (10)Interrupt Controller with 13 flexible inputs; (11)Programmable Interrupt Vector Response For On-Chip Peripheral Modules; (12)Hardware Watchdog Timer; (13)Software Watchdog Timer; (14)Low-Power Mode Control; (15)Up to 78-Bit Individually Programmable Parallel I/O Ports; (16)PCMCIA 1.0 Support; (17)Support IrDA Physical Layer Protocol; (18)8 Bytes FIFO on Rx and Tx; (19)Support For External POCSAG Decoder (Slave); (20)Support for Digitizer from A/D Input or EEPROM (Master); (21)Multimode Operation, Independent Capture/Compare Registers; (22)Automatic Interrupt Generation; (23)240-ns Resolution At 16.67-MHz System Clock; (24)Each Timer Has An Input And An Output Pin for Capture and Compare; (25)Programmable Frame rate; (26)16 Bit programmable; (27)Supports Motor Control; (28)24 Hour Time; (29)One Programmable Alarm; (30)5 V or 3.3 V Operation; (31)Fully Static HCMOS Technology; (32)Programmable Clock Synthesizer for Full Frequency Control; (33)Low Power Stop Capabilities; (34)Modules Can Be Individually Shut-down; (35)Lowest Power Mode Control (Shut Down CPU and Peripherals; (36)Operation From DC To 16.67 MHz (Processor Clock); (37)Operating Voltages of 3.3V ±0.3V and 5V ±0.5V; (38)Compact 144-Lead Thin Quad Flat Pack (TQFP) Package.

Diagrams